Technical Field
The present invention relates generally to semiconductor devices, and more specifically, to polysilicon (poly-Si) residue removal in metal oxide semiconductor field effect transistor (MOSFET) nanosheets.
Description of the Related Art
The need to remain cost and performance competitive in the production of semiconductor devices has driven integrated circuits to increased device density. To facilitate the increase in device density, new technologies are constantly needed to allow the feature size of these semiconductor devices to be reduced. The push for ever increasing device densities is particularly strong in complementary metal oxide semiconductors (CMOS) technologies such as in the design and fabrication of field effect transistors (FETs).
During the construction of an integrated circuit structure, a polysilicon layer can be formed which covers a raised portion or step on the integrated circuit structure. Such a step can, for example, include an oxide portion such as an isolation oxide or an oxide-covered polysilicon line. Subsequent masking and anisotropic etching of this polysilicon layer, for example, to form another polysilicon line, can result in undesirable residues being left behind on the sidewalls of the polysilicon lines on the integrated circuit structure after the anisotropic etching step.